U.S. Pat. No. 3,925,731 of R. C. Brainard and J. C. Candy, issued Dec. 9, 1975, discloses a differential pulse coded system using shift register companding. The system employs a bidirectional shift register in which a 1-bit differential pulse code is converted to analog form by a companded digital integration, i.e., a digital accumulation, followed by a digital-to-analog conversion for producing a discrete approximation of the analog signal represented by the differential pulse code. The term "companded integration" is defined in that patent as meaning one employing non-uniform step sizes and distinguishing from uniform integration employing uniform step sizes, even though in both cases a compressed code may be employed.
The bidirectional shift register employed in such a system is operative to move a 1-bit differential pulse code represented by a sequence of binary ones followed by a sequence of binary zeros in a succession of shift register stages. The sequence is characterized by a 0-1 interface at a pair of neighboring stages. The code in total, but most importantly the interface, is moved in response to an analog input signal back and forth in the shift register to positions in the register determinative of a corresponding digital output in each instance according to the teachings of the above-mentioned patent.
Although the arrangement is particularly attractive in organization, the implementation thereof in the form of an integrated semiconductor chip is complicated because of the necessity of a relatively large number of semiconductor elements heretofore. This problem is brought into focus when the use of such an arrangement for digitizing the telephone system is considered. The economics of such arrangements are such that 24 telephone lines are presently multiplexed for use with a single coder for digitizing signals. The ideal, of course, would be a coder for each telephone line. This ideal can be reached only when low cost integration of the coder reduces the present price significantly.
The use of a bidirectional shift register as disclosed in the above-mentioned patent permits some reduction in cost over prior art coders. But still the cost is too high to permit a coder per telephone line. The high cost of this type of system is clear when one considers the number of elements necessary for its implementation. Consider, for example, an 8-bit bidirectional shift register of the type SN54194 shown in Texas Instruments Inc.'s TTL Data Book for Design Engineers, 1973 edition, on page 438, where each of the blocks (CK) includes one-half of a number 7474 register shown in the Data Book at page 122.